Senior ASIC Design Engineer — San Francisco

We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to pursue, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice to join us today. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading GPU and SoC's. With the System-ASIC team, you will contribute to designing multiple products that will be used in a variety of applications from consumer graphics to self-driving cars and the growing field of artificial intelligence. System-ASIC team works closely with System Architecture team on product definitions, implements new innovative flows to improve our chip yield and to address multiple sectors, defines Reset and Boot Architecture and implements them in complex GPU and Tegra chips. The team is also handling the architecture, design, and synthesis of multiple System-level modules. What you’ll be doing: • Be an integral part of the System ASIC Design team to help develop and improve our RTL and SOC designs • Collaborate with architects, ASIC designers, and verification engineers to design sophisticated system-level modules such as Floorsweep, In-silicon measurement, Reset and Boot controllers. • You will be responsible for the RTL design, logic synthesis, and timing analysis of several modules. • Integrate modules into the overall SOC design and work closely with other teams in the silicon bring-up process and ensure successful SOC level integration. • You will also use your expertise to identify and implement improvements in the current design flow and methodologies to improve efficiency and quality.   What we need to see: • BS / MS in Microelectronics/ Electronic Engineering/ Computer Science and related (or equivalent experience). • 5+ years of ASIC design experience or SOC integration design / flow experience • Fundamental digital design concepts and experience in ASIC design flow including RTL design, verification, logic synthesis and timing analysis • Strong coding skills in Perl, Python, C++, or other industry-standard scripting languages • Basic understanding of verification methodology • Excellent analytical and problem-solving skills and attention to detail.   Ways to stand out from the crowd: • Familiarity with ARM CPU and SoC system architecture, microprocessor, and microcontroller fundamentals (caches, buses, memory controllers, DMA, etc.) • Experience with reset controllers, boot, fuse controllers or UCIe protocol • Hands-on experience in programming (C/C++) and scripting (Perl/Python). # LI-Hybrid Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits . Applications for this job will be accepted at least until September 20, 2026. This posting is for an existing vacancy.  NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.